PARTNO U306 ; NAME U306 ; DATE May 2, 1990 ; REV 1 ; DESIGNER Dave Haynie ; COMPANY Commodore-Amiga ; ASSEMBLY BIGRAM ; LOCATION U306 ; /************************************************************************/ /* */ /* Zorro III BIGRAM DRAM Refresh Counter. */ /* */ /* This device is responsible for generating refresh request. */ /* */ /************************************************************************/ /* */ /* DEVICE DATA: */ /* */ /* Device: 16R8-25 */ /* Clock: C7M */ /* Unused: /* */ /************************************************************************/ /* */ /* REVISION HISTORY: */ /* */ /* DBH 05-02: Original version. */ /* */ /************************************************************************/ /* INPUTS: */ PIN 2 = !REFACK ; /* We're servicing a refresh request */ PIN 3 = !REFCYC; /* We're in a refresh cycle. */ /* BIDIRECTIONALS: */ PIN 19 = !REFREQ ; /* Refresh request */ /* USED INTERNALLY: */ PIN 18 = !R0 ; /* Counter bits */ PIN 17 = !R1 ; PIN 16 = !R2 ; PIN 15 = !R3 ; PIN 14 = !R4 ; PIN 13 = !R5 ; PIN 12 = !R6 ; /** INTERNAL TERMS: **/ field count = [R6..0]; /** OUTPUT TERMS: **/ /* The refresh request is asserted when the terminal count has been reached. It's held until REFHOLD is asserted. */ REFREQ.D = count:70 # REFREQ & !REFCYC; /* The refresh counter is pretty simple. We're assuming one refresh cycle every 15,625ns, which works out fine for the 8ms, 512 row 1 Meg parts or the 16ms, 1024 row 4 Meg parts. However, the maximum TRAS period is only 10,000ns, which must be taken into account to support burst mode. Counting 71 140ns C7M clocks gets me to 9,940ns, close enough. The counter resets when REFCYC comes along. */ R0.D = !REFCYC & !R0; R1.D = !REFCYC & R0 & !R1 # !REFCYC & !R0 & R1; R2.D = !REFCYC & R0 & R1 & !R2 # !REFCYC & !R1 & R2 # !REFCYC & !R0 & R2; R3.D = !REFCYC & R0 & R1 & R2 & !R3 # !REFCYC & !R2 & R3 # !REFCYC & !R1 & R3 # !REFCYC & !R0 & R3; R4.D = !REFCYC & R0 & R1 & R2 & R3 & !R4 # !REFCYC & !R3 & R4 # !REFCYC & !R2 & R4 # !REFCYC & !R1 & R4 # !REFCYC & !R0 & R4; R5.D = !REFCYC & R0 & R1 & R2 & R3 & R4 & !R5 # !REFCYC & !R4 & R5 # !REFCYC & !R3 & R5 # !REFCYC & !R2 & R5 # !REFCYC & !R1 & R5 # !REFCYC & !R0 & R5; R6.D = !REFCYC & R0 & R1 & R2 & R3 & R4 & R5 & !R6 # !REFCYC & !R5 & R6 # !REFCYC & !R4 & R6 # !REFCYC & !R3 & R6 # !REFCYC & !R2 & R6 # !REFCYC & !R1 & R6 # !REFCYC & !R0 & R6;