PARTNO		U207 ;
	NAME		U207 ;
	DATE		January 14, 1993 ;
	REV		2 ;
	DESIGNER	Dave Haynie ;
	COMPANY		Commodore ;
	ASSEMBLY	A3090 ;
	LOCATION	West Chester ;
	DEVICE		g22v10 ;

/************************************************************************/
/*									*/
/*	A3090	ROM access timer and interrupt support.			*/
/*									*/
/*	This device counts clocks for ROM access timing and supports	*/
/*	some of the interrupt munging.					*/
/*									*/
/************************************************************************/
/*									*/
/* DEVICE DATA:								*/
/*									*/
/*	Device:		22V10-15					*/
/*	Clock:		CLK (25MHz)					*/
/*	Unused:		2(I),3(I),4(I),14(IO),21(IO)			*/
/*									*/
/************************************************************************/
/*									*/
/* REVISION HISTORY:							*/
/*									*/
/*	DBH Jul  1:	Original version.				*/
/* 	DBH Nov 13:	Changed in support of the no-vector default.	*/
/* 	DBH Nov 13:	Changed for 25MHz clock.			*/
/*	DBH Jan 14:	Slowed ROM access so we can use cheap-ass ROM.	*/
/*									*/
/************************************************************************/

/** INPUTS: **/

PIN 1		=  CLK		;	/* 25MHz system clock. */
PIN 5		= !DS0		;	/* Low byte data strobe. */
PIN 6		=  READ		;	/* Z3 READ signal. */
PIN 7		= !RST		;	/* System reset signal. */
PIN 8		= !SINT		;	/* SCSI interrupt. */
PIN 9		= !INTVEC	;	/* Interrupt vector generation. */
PIN 10		=  FCS		;	/* Z3 full cycle strobe. */
PIN 11		= !SLAVE	;	/* Board select. */
PIN 13		= !CFGOUT	;	/* Configuration chain output. */
PIN 16		= !ROM		;	/* ROM select decode. */

/** OUTPUTS: **/

PIN 20		= !NACK		;	/* Data acknowledge. */
PIN 22		= !INT		;	/* Interrupt output. */
PIN 23		= !INT2		;	/* Zorro bus interrupt 2. */

/** USED INTERNALLY: **/

PIN 15		= !NS3		;	/* ROM access counter. */
PIN 17		= !NS2		;
PIN 18		= !NS1		;
PIN 19		= !NS0		;

/** INTERNAL TERMS: **/

/* The state vector */

field state	= [NS3..0];

/* Start and continue terms. */

startcnt	= ROM & FCS & !NACK;

stopcnt		= !FCS
		#  NACK;

/** OUTPUT TERMS: **/

/* The interrupt process line is generated based on the SCSI interrupt. 
   It can only change between Zorro III cycles. */

INT		= !FCS & SINT
		#  INT & SINT
		#  FCS & INT;

/* The actual Zorro III bus interrupt is an open-drain version of
   INT. */

INT2		= 'b'1;
INT2.OE		= INT;

/* This is a simple counter for ROM access states.  The counter
   resets itself once a termination is generated. */

NS0.D		= !RST & startcnt & !NS0;

NS1.D		= !RST & !stopcnt & NS0 & !NS1
		# !RST & !stopcnt & !NS0 &  NS1;

NS2.D		= !RST & !stopcnt &  NS0 &  NS1 & !NS2
		# !RST & !stopcnt & !NS0 &         NS2
		# !RST & !stopcnt &        !NS1 &  NS2;

NS3.D		= !RST & !stopcnt &  NS0 &  NS1 &  NS2 & !NS3
		# !RST & !stopcnt &  NS3;

[NS3..0].AR	= RST;

/* The ROM termination signal is set up to handle pretty much any kind
   of ROM, since we only read the ROM for initialization.  Assuming a
   cycle time of 400ns at 25MHz, we need to count 10 states. */

NACK		=  ROM & state:a
		# NACK & FCS & !RST;
NACK.AR		= RST;