Partno		390526-02;
Name            (CHIPCASA.PLD) 32 bit chip RAM logic.;
Date            11/10/89;
Rev             02;
Designer        Greg Berlin;
Company         Commodore;
Assembly        ;
Location        U202;

/* Target PAL Device : 16L8-10 */

/**************************************************************************/
/*                           R E V I S I O N S                            */
/**************************************************************************/
/*  02 - 12/6/89                                                          */
/*       Add LMADR term	                                                  */
/**************************************************************************/

/* INPUTS */

pin 11 	= !CASL;	/* CAS'es out of AGNUS */
pin 9	= !CASU;
pin 8	= MA9; 		/* Mux'ed address bit 9. Has A20 value at CAS time */
pin 7	= MA0I;		/* Mux'ed address bit 0. Has A1 value at CAS time */
pin 6	= !BLIT;	/* If low, then BLITTER is doing the accessing */
pin 1   = !CDAC;
pin 2	= !LLDS;	/* 68030 data strobes */
pin 3	= !UUDS;
pin 4	= !UMDS;
pin 5	= C3;

/* OUTPUTS */

pin 19	= !LMADR;	/* Latch mux'ed address */
pin 18	= !CAS0; 
pin 17 	= !CAS1;
pin 16	= !CAS2;
pin 15	= !CAS3;
pin 14	= !CAS4;
pin 13	= !CAS6;		


A1	= MA0I;
A20	= MA9;


CAS0	= !BLIT & (CASL # CASU) & UMDS & CDAC & C3 & !A20 /* start it for 68030 access */
	#  BLIT & CASL & CDAC & C3 & !A20 & !A1		  /* start it for CHIP access */
	# CAS0 & (CASL # CASU);				  /* Finish it up for both */

CAS1	= !BLIT & (CASL # CASU) & UUDS & CDAC & C3 & !A20 /* start it for 68030 access */
	#  BLIT & CASU & CDAC & C3 & !A20 & !A1		  /* start it for CHIP access */
	# CAS1 & (CASL # CASU);				  /* Finish it up for both */

CAS2	= !BLIT & (CASL # CASU) & UMDS & CDAC & C3 & A20  /* start it for 68030 access */
	#  BLIT & CASL & CDAC & C3 & A20 & !A1	 	  /* start it for CHIP access */
	# CAS2 & (CASL # CASU);				  /* Finish it up for both */

CAS3	= !BLIT & (CASL # CASU) & UUDS & CDAC & C3 & A20  /* start it for 68030 access */
	#  BLIT & CASU & CDAC & C3 & A20 & !A1	 	  /* start it for CHIP access */
	# CAS3 & (CASL # CASU);				  /* Finish it up for both */

CAS4	= !BLIT & (CASL # CASU) & LLDS & CDAC & C3 & !A20 /* start it for 68030 access */
	#  BLIT & CASL & CDAC & C3 & !A20 & A1	 	  /* start it for CHIP access */
	# CAS4 & (CASL # CASU);				  /* Finish it up for both */

CAS6	= !BLIT & (CASL # CASU) & LLDS & CDAC & C3 & A20  /* start it for 68030 access */
	#  BLIT & CASL & CDAC & C3 & A20 & A1	 	  /* start it for CHIP access */
	# CAS6 & (CASL # CASU);				  /* Finish it up for both */

LMADR	= CASL # CASU;