PARTNO		31XXXX ;
		NAME            U123 ;
		DATE            May 27, 1992 ;
		REV             7 ;
		DESIGNER        Dave Haynie ;
		COMPANY         Commodore ;
		ASSEMBLY        AA3000 ;
		LOCATION        U123 ;
		DEVICE		p22v10 ;

/************************************************************************/
/*									*/
/*  AA3000	DSP3210 Bus Arbiter 					*/
/*									*/
/************************************************************************/
/*  Allowable Target Device Types: 22V10-10 				*/
/************************************************************************/
/*  Clock:		CPUCLK (25MHz)					*/
/************************************************************************/
/*  Free Pins:		NONE						*/
/************************************************************************/
/*  HISTORY								*/
/*	DBH Jan 31:	Completely new.					*/
/*	DBH Nov 20:	Revised for Rev2 PCB.				*/
/*	DBH Feb  4:	Arbiter if FUBAR, new arbiter design put in.	*/
/*	DBH Feb  6:	Improved handling of consecutive cycles.	*/
/*	DBH Feb  6:	Changed BURST/CBREQ and added CPUCLK.		*/
/*	DBH Feb 10:	Improved SNOOP function, AS* input added. 	*/
/*	DBH May 27:	RESET control added. 				*/
/*	DBH May 27:	New arbiter design, required U701 change too!	*/
/************************************************************************/

/** Inputs **/

PIN 1		=  CPUCLK	;	/* Main '030 clock. */
PIN 2		= !dspGO	;	/* DSP external grant. */
PIN 3		= !dspBR	;	/* DSP bus request. */
PIN 4		= !SBR		;	/* SCSI bus request. */
PIN 5		= !XBG		;	/* Bus grant from Buster. */
PIN 6		= !dspBGACK	;	/* DSP bus grant acknowledge. */
PIN 7		= !preBERR	;	/* Unsynced Bus Error. */
PIN 8		= !CBREQ	;	/* Burst cycle, could be for DSP. */
PIN 9		= !AS		;	/* 030 Address strobe. */
PIN 11		=  A3		;	/* 030 Addresses */
PIN 13		=  A2		;
PIN 15		= !SNOOP	;	/* Arbitration snooper */
PIN 16		= !RST		;	/* System Reset */

/**  Outputs  **/

PIN 18		= !dspBERR	;	/* DSP bus error */
PIN 20		= !SBG		;	/* SCSI bus grant */
PIN 21		= !dspREQ	;	/* 680x0 style DSP bus request */
PIN 22		= !dspBG	;	/* DSP bus grant */
PIN 23		= !XBR		;	/* Bus request to Buster */

/**  Bidirectionals  **/

PIN 14		= !dspHOLD	;	/* Hold us on the bus a bit longer. */
PIN 17		= !dspCYC	;	/* DSP is in charge */
PIN 19		= !BGACK	;	/* 68030 system bus grant acknowledge */

/**  Declarations and Intermediate Variable Definitions  **/

/**  Logic Equations  **/

/* The DSP bus error line is just system BERR, when the DSP is bus
   master, synched up to the clock. */

dspBERR.D	= preBERR & dspBGACK;
dspBERR.AR	= RST;

/* Right now, just feed SCSI to Buster and back again. */

XBR		= SBR;
SBG		= XBG;

/* This generates a 680x0 style bus request for the DSP.  It'll only get
   generated if we need the bus and haven't taken it yet. */

dspREQ.D	= dspBR & !dspCYC;
dspREQ.AR	= RST;

/* AT&T recommends the bus should be held a tad longer than the DSP would
   indicate, in case the DSP is going to immediately re-take it.  This
   should, in theory, make things faster, since you'll spend less time in
   bus arbitration.  This terms gives us an extra clock's worth of hold;
   not quite what AT&T asks for, but close enough (considering dspCYC also
   tends to hold us on an extra clock. */

dspHOLD.D	= dspGO
		# dspBGACK
		# dspBR
		# SNOOP;
dspHOLD.AR	= RST;

/* The DSP cycle can only begin when we have a dspWIN, no other BGACK on the
   bus, and no SNOOP activity.   Once the DSP has the bus, it keeps the bus
   as long as its asserting dspBGACK or dspBR. */

dspCYC.D	= !BGACK & dspGO & !SNOOP & !AS & !SBG & !XBG
		# dspCYC & dspGO
		# dspCYC & dspBGACK
		# dspCYC & dspBR
		# dspCYC &  SNOOP
		# dspCYC & dspHOLD;
dspCYC.AR	= RST;

/* This is the actual bus grant acknowledge logic for the system.  I drive
   this out to the system once dspCYC assures me that other system bu masters 
   have dropped it.  It stays on as long as dspCYC. */

BGACK		= dspCYC;
BGACK.OE	= dspCYC;

/* The grant out to the DSP, like most DSP signals, is driven synchronously.
   Grant back to the DSP will cause it to take the bus immediately, so I have
   to wait until I really have the bus before letting the DSP in on things.
   Once request is dropped by the DSP, I'll let grant go.  */

dspBG.D		= dspCYC & dspBR;
dspBG.AR	= RST;