PARTNO	 	XXXXX ;
		NAME		U681 ;
		DATE		September 1, 1991;
		REV		2 ;
		DESIGNER	Dave Haynie ;
		COMPANY		Commodore ;
		ASSEMBLY	A3000+ ;
		LOCATION	West Chester ;

/************************************************************************/
/*									*/
/*  A3000+	Interrupt latch, primary bus arbitration, reset routing	*/
/*									*/
/************************************************************************/
/*  Allowable Target Device Types: 22V10-25	 			*/
/************************************************************************/
/*  Clock:		C7M						*/
/************************************************************************/
/*  Free Pins:		6(I), 7(I)					*/
/************************************************************************/
/*  HISTORY								*/
/*	DBH Jan 29:	Based on U681r1 for A3000+ Rev 1 PCB.		*/
/************************************************************************/

/**  Inputs  **/

PIN 1		=  C7M		;	/* 7MHz clock */
PIN 2		= !BG30		;	/* Bus Grant from 68030 */
PIN 3		= !CBR		;	/* Coprocessor slot bus request */
PIN 4		= !BOSS		;	/* Coprocessor slot owns system */
PIN 5		= !KBRST	;	/* Keyboard reset line */
PIN 8		= !IHLT		;	/* System HLT input */
PIN 9		= !INTENB	;	/* Interrupt enable */
PIN 10		= !CIPL2	;	/* Chip conditioned interrupts */
PIN 11		= !CIPL1	;
PIN 13		= !CIPL0	;

/**  Outputs  **/

PIN 14		= !IPL0		;	/* CPU interrupts */
PIN 15		= !IPL1		;
PIN 16		= !IPL2		;
PIN 17		= !ERST		;	/* Buffered expansion bus reset. */
PIN 18		= !IORST	;	/* Reset for I/O devices. */
PIN 19		= !FPURST	;	/* Reset for FPU. */
PIN 23		= !BG		;	/* Bus grant out to Buster */
PIN 22		= !OHLT		;	/* Output expansion bus HLT */

/** Bidirectionals **/

PIN 21		= !RESET	;	/* Main system reset, output. */
PIN 20		= !CPURST	;	/* Reset for main processor. */

/** Declarations and Intermediate Variable Definitions **/

/**  Logic Equations  **/

/* Here we clock and apply the fast enable to the interrupt bits. */

IPL2.D	= CIPL2 & INTENB;

IPL1.D	= CIPL1 & INTENB;

IPL0.D	= CIPL0 & INTENB;

/* This is the bus grant output term.  In general, we want BG30 connected
   with BG when the coprocessor is not in charge of things.  However, we
   have to take care that this arbitration doesn't take place out of sync
   with the secondary arbitrations that happen in Buster.  So the CPU slot
   can't assert CBR until it sees BG and BGACK negated.  The CBR term here
   keeps the Coprocessor-initiated BG from being seen by the main bus
   arbiter.  The 68030 and coprocessor slots are called primary bus masters;
   they're the ones responsible for driving BG and acknowledging BR. */

BG	= BG30 & !CBR;
BG.OE	= !BOSS;

/* This is the monster reset mess here.  The is KBRST, which is the power
   up or keyboard reset.  That's only an input, and it causes every other
   reset line to fire.  The rest are somewhat interconnected. */

/* The expansion halt line is only driven low during a keyboard reset. */

OHLT		= KBRST;
OHLT.OE		= KBRST;

/* CPU reset is driven low during either a keyboard reset or a full 
   expansion bus reset.  Since KBRST will generate a full expansion
   reset, CPURST only need be based on that expansion reset. */

CPURST		= RESET & IHLT;
CPURST.OE	= RESET & IHLT;

/* The FPU reset need only based on CPURST.  But to avoid loops, CPURST
   doesn't react directly to a KBRST.  So FPURST will, causing RESET to
   assert and, in turn, drive CPURST.  When KBRST negates, CPURST will
   negate, then FPURST, then RESET. */   

FPURST		= CPURST 
		# KBRST;

/* This is the main reset line, and it's used bidirectionally.  It is driven
   as an output for either a keyboard reset or a CPU reset.  Both of those
   are handled by FPURST.  As an input, RESET acts as an I/O reset if driven
   alone, affecting only ERST and IORST.  If accompanied by IHLT, it's a full
   system reset.  It will actually loop back during full system reset, in 
   that RESET and IHLT asserts CPURST, which in turn asserted FPURST, which
   in turn again asserts RESET.  However, since the input HLT will be negated
   at the end of the reset pulse, and break the chain at CPURST, this can't be
   an infinite latch. */

RESET		= FPURST;
RESET.OE	= FPURST;

/* The expansion resets only need look at the main system reset. */

ERST		= RESET;

IORST		= RESET;