PARTNO 31XXXX ; NAME U121 ; DATE August 14, 1991 ; REV 1 ; DESIGNER Dave Haynie ; COMPANY Commodore ; ASSEMBLY A3000+ ; LOCATION West Chester ; /************************************************************************/ /* */ /* A3000+ DSP3210 Bus Interface control */ /* */ /************************************************************************/ /* Allowable Target Device Types: 22V10-10 */ /************************************************************************/ /* Clock: !dspCLK (50MHz) */ /************************************************************************/ /* Free Pins: NONE */ /************************************************************************/ /* HISTORY */ /* DBH Aug 14: Almost completely new. */ /************************************************************************/ /** Inputs **/ PIN 1 = !DSPCLK ; /* Inverted DSP system clock */ PIN 2 = !BURSTEN ; /* DSP burst-cycle enable */ PIN 3 = !DSPAS ; /* DSP address strobe */ PIN 4 = !RW ; /* 68030 R/W */ PIN 5 = !DSACK0 ; /* Termination signals */ PIN 6 = !DSACK1 ; PIN 7 = !STERM ; PIN 8 = !BLM ; /* DSP block move indicator */ PIN 9 = !CBACK ; /* 68030 cache burst acknowledge */ PIN 10 = !DSPBGACK ; /* DSP bus grant acknowledge */ PIN 11 = MS3 ; /* DSP memory sizing strobes */ PIN 13 = MS2 ; /** Outputs **/ PIN 15 = FC1 ; /* 68030 function code */ PIN 16 = !BURST ; /* DSP running a burst cycle */ PIN 17 = SIZ0 ; /* 68030 sizing lines */ PIN 18 = SIZ1 ; PIN 19 = !CBREQ ; /* 68030 cache burst request */ PIN 20 = !DSSYNC ; /* Synchronized DSACK */ PIN 21 = !SRDY ; /* DSP cycle termination */ PIN 22 = !DS ; /* 68030 compatible data stobe */ /** Bidirectionals **/ PIN 14 = !SNOOP ; /* Watch out for bus activity */ PIN 23 = !AS ; /* 68030 address strobe */ /** Declarations and Intermediate Variable Definitions **/ /** Logic Equations **/ /* The snooper function is designed to aid the DSP bus arbiter PAL, by watching the bus for activity during DMA acquisition. Once the DSP on the bus, SNOOP works in the other direction, watching out for A3-A2=11, a block move termination indicator. */ SNOOP = !DSPBGACK & AS # !DSPBGACK & DSACK0 # !DSPBGACK & DSACK1 # !DSPBGACK & STERM; SNOOP.OE = !DSPBGACK; /* This function code is simply driven low whenever the DSP accesses the 68030 bus. The DSP doesn't have a function space equivalent available externally; this will set the system function code to Supervisor Data Space. */ FC1 = 'b'0; FC1.OE = DSPBGACK; /* The DSP gets a synchronous termination signal from the 68030 system one way or another. If the 68030 transfer isn't 32-bits wide, the Gary+ chip will generate a bus error. */ DSSYNC.D = DSPBGACK & DSACK0 & DSACK1 & AS; SRDY = DSPBGACK & STERM # DSPBGACK & DSSYNC & AS; /* Here we make an AS and DS from the DSP AS. Of course, the data strobe needs to look at R/W as well. */ AS.D = DSPBGACK & DSPAS # DSPBGACK & AS & BURST; AS.OE = DSPBGACK; DS.D = DSPBGACK & DSPAS & RW # DSPBGACK & DSPAS & AS & !RW # DSPBGACK & DS & BURST; DS.OE = DSPBGACK; /* Now we gotta try to deal with burst mode. While the normal cycle of the DSP3210 looks pretty 68030-ish, the burst cycle is more 68040-ish. Technically speaking, it looks alot like an '040 burst-inhibited line read. DSP block moves always start on an A3-A2=00 location (even quadlongword). The start of a block move is given by MS3-MS2=11 and BLM asserted. The cycle is always four longwords in length, the DSP increments A3-A2 in order, and MS3-MS2=00 for the 2nd, 3rd, and 4th longword. Note that, if it's not a block transfer, SIZ0=MS2, SIZ1=MS3. During a burst, both size bits go to 0. In any case, we can only request a burst on the first longword of a block transfer. If we get the burst acknowledge, we want to keep AS low until the cycle is over, as indicated by SNOOP being asserted. */ SIZ1 = MS3 & !BLM; SIZ1.OE = DSPBGACK; SIZ0 = MS2 & !BLM; SIZ0.OE = DSPBGACK; BURST = BURSTEN & BLM # BURSTEN & BURST & CBACK # BURSTEN & BURST & AS & !MS3 & !MS2 & !SNOOP; CBREQ = BURST; CBREQ.OE = DSPBGACK;