PARTNO		U307 ;
	NAME		AUTOCONFIG ;
	DATE		May 23, 1991 ;
	REV		1 ;
	DESIGNER	Dave Haynie;
	COMPANY		Commodore ;
	ASSEMBLY	A2631 ;
	LOCATION	West Chester;

/************************************************************************/
/*									*/
/*	A2631	Autoconfiguration Control				*/
/*									*/
/*	Configuration registers actually go in the ROMs, but this 	*/
/*	device controls configuration-related items.			*/
/*									*/
/************************************************************************/
/*									*/
/* DEVICE DATA:								*/
/*									*/
/*	Device:		22V10-15					*/
/*	Clock:		NONE						*/
/*	Unused:		IO(15)						*/
/*									*/
/************************************************************************/
/*									*/
/* REVISION HISTORY:							*/
/*									*/
/*	DBH	May 23:	Original version.				*/
/*									*/
/************************************************************************/

/** INPUTS: **/

PIN 1		=	!HALT		;	/* A2000 HALT signal */
PIN 2		=	!AAS		; 	/* A2000 Address Strobe */
PIN 3		=	!UDS		;	/* A2000 Data Strobe */
PIN 4		=	 ARW		;	/* A2000 R/W */
PIN 5		=	!BOSS		;	/* A2000 BOSS control */
PIN 6		=	 A15		;	/* Addresses */
PIN 7		=	 A6		;
PIN 8		=	 A5		;
PIN 9		=	 A4		;
PIN 10		=	 A3		;
PIN 11		=	 A2		;
PIN 13		=	 A1		;
PIN 14		=	!MATCH		;	/* Config address match */

/** OUTPUTS: **/

PIN 16		=	!CFGOUT		;	/* Configuration chain output */
PIN 17		=	 CFGLT		;	/* Configuration address latch */
PIN 18		=	!ROMCS		;	/* ROM Chip Select */
PIN 19		=	!MODE68K	;	/* 68000 Mode? */
PIN 21		=	!FPURST		;	/* FPU Reset */
PIN 22		=	!BUSRST		;	/* Bus controller reset */

/** BIDIRECTIONALS **/

PIN 20		=	!CPURST		;	/* 68030 reset */
PIN 23		=	!RESET		;	/* Global raw reset */

/** INTERNAL TERMS: **/

field addr	= [A6..1];


/** OUTPUT TERMS: **/

/* The configuration stuff.  The actual configuration ROM is in the physical
   ROM here.  This implements the configuration latch and chain.  Because this
   is the Coprocessor, we have an implicit CFGIN. */

CFGLT		= addr:48 & BOSS & !ARW & UDS
		# CFGLT & !RESET;

CFGOUT		= CFGLT & !AAS & BOSS
		# CFGOUT & !RESET;

/* The ROM chip select is easy; ROM is always the base address on up until 
   the halfway mark.  ROM shows up, configed or unconfiged. */

ROMCS		= MATCH & AAS & ARW & RESET & BOSS & !A15;


/* The 68000 vs. 68030 mode is a bit goofy here.  Basically, when the top half
   of the configuration register is written to, we toggle this bit.  A full reset
   will turn it off. */

MODE68K		= !MODE68K & MATCH & AAS & !ARW & RESET & BOSS & A15;
                #  MODE68K & !RESET & !HALT & !(MATCH & AAS & !ARW & A15);

/* Here's the reset mess. The full system reset is signaled by RESET & HALT or
   MODE68K.  Either of these reset the bus controller.  We also wait for BOSS
   before turning anything else on. */

BUSRST		=  RESET & HALT
		#  MODE68K
		# !BOSS;

/* The FPU reset is driven with BUS Reset. */

FPURST		= BUSRST;

/* The CPU reset is driven with BUS Reset.  However, if we're configured, it will
   act as an input too. */

CPURST		= BUSRST;
CPURST.OE	= BUSRST;

/* The RESET line is driven back out as an I/O reset if CPURST goes low after we're
   configured.  The wait is to assure that RESET in doesn't loop back through RESET
   and cause the system to hang permently in the reset state. */

RESET		= CPURST & CFGOUT & !MODE68K;
RESET.OE	= CPURST & CFGOUT & !MODE68K;