LISTING FOR LOGIC DESCRIPTION FILE: bctl.pld Page 1 CUPL: Universal Compiler for Programmable Logic Version 3.2a Serial# MD-32A-6848 Copyright (C) 1983,1989 Logical Devices, Inc. Created Thu Feb 17 18:57:34 1994 1: NAME BCTL; 2: PARTNO 391472-03; 3: REVISION 03; 4: DATE 2/16/94; 5: DESIGNER Schaeffer/Haynie; 6: COMPANY CBM; 7: ASSEMBLY A3000 040 coprocessor; 8: LOCATION U209; 9: DEVICE g22V10; 10: 11:/************************************************************************/ 12:/* */ 13:/* A3640 68040 enhanced bus master control PAL */ 14:/* */ 15:/************************************************************************/ 16:/* Clock: BCLK */ 17:/************************************************************************/ 18:/* Free Pins: I(8),I(10),I(11),I(13) */ 19:/* IO(18),IO(22) */ 20:/************************************************************************/ 21:/* HISTORY */ 22:/* SS 92: Completely new. */ 23:/* SS Nov 92: Bus lockup problems with DMA. When bus busy */ 24:/* was negated in state 9, control passed to state */ 25:/* 0. This didn't adequately handle "implicit */ 26:/* ownership", since state 9 was also granting the */ 27:/* bus. Fixed by holding state 9 until the bus */ 28:/* busy was again asserted. */ 29:/* DBH Feb 17: Problems with bus lockup! */ 30:/* 1) LOCKE and LOCK polarities reversed. */ 31:/* 2) State 9 loops on !BB, causing reqlinquish to */ 32:/* an '030 request having to wait until the */ 33:/* '040 wants the bus. 7-49 of the '040 user's */ 34:/* manual warns of this. */ 35:/* The arbiter now handles implicit ownership and */ 36:/* as well a lock occuring on an arbitration */ 37:/* boundary. */ 38:/************************************************************************/ 39: 40:/** Inputs **/ 41:PIN 1 = bclk ; 42:PIN 2 = !bgack30_ ; 43:PIN 3 = !br30_ ; 44:PIN 4 = !bb ; 45:PIN 5 = !br40_ ; 46:PIN 6 = !lock ; 47:PIN 7 = !locke ; 48:PIN 9 = !pwrst ; 49: 50:/** Outputs **/ 51: 52:PIN 19 = !bg40_ ; 53:PIN 20 = !bg30_ ; LISTING FOR LOGIC DESCRIPTION FILE: bctl.pld Page 2 CUPL: Universal Compiler for Programmable Logic Version 3.2a Serial# MD-32A-6848 Copyright (C) 1983,1989 Logical Devices, Inc. Created Thu Feb 17 18:57:35 1994 54:PIN 21 = !bgack040 ; 55: 56:/** Used Internally **/ 57: 58:PIN 14 = !bs1 ; 59:PIN 15 = !bs0 ; 60:PIN 16 = !bs2 ; 61:PIN 17 = !bs3 ; 62: 63:/** Declarations**/ 64: 65:field bs_stat = [bs0,bs1,bs2,bs3]; 66: 67:/** master state definitions **/ 68:$define R00 'b'0000 /* bs = f */ 69:$define R01 'b'0110 /* bs = 9 */ 70:$define R02 'b'0010 /* bs = d */ 71:$define R03 'b'0011 /* bs = c */ 72:$define R04 'b'1010 /* bs = 5 */ 73:$define R05 'b'0100 /* bs = b */ 74:$define R06 'b'1100 /* bs = 3 */ 75:$define R07 'b'1001 /* bs = 6 */ 76:$define R08 'b'1000 /* bs = 7 */ 77:$define R09 'b'0101 /* bs = a */ 78:$define R10 'b'0001 /* bs = e */ 79: 80:$define STATE0 out bgack040 81:$define STATE1 out bg30_ 82:$define STATE2 out bg30_ 83:$define STATE3 84:$define STATE4 85:$define STATE5 out bg30_ 86:$define STATE6 out bg30_ 87:$define STATE7 out bgack040 88:$define STATE8 out bgack040 89:$define STATE9 out bgack040 90:$define STATE10 out bgack040 91: 92:/* This gets all the reset terms out of the state machine proper, 93: but achieves the same effect. */ 94: 95:[bs3..0].ar = pwrst; 96: 97:/* The state machine proper. */ 98: 99:sequence bs_stat { 100: /* This is the idle state. If neither master wants the 101: bus, we stick aroun here. As soon as one does, we 102: jump to either's particular mastership branch. */ 103: present 'b'0000 104: if bgack30_ next 'b'1010 ; 105: if !bgack30_ & br30_ next 'b'0110 out bg30_; 106: if !bgack30_ & !br30_ & br40_ next 'b'1001 out bgack040; 107: if !bgack30_ & !br30_ & !br40_ next 'b'0000 out bgack040; LISTING FOR LOGIC DESCRIPTION FILE: bctl.pld Page 3 CUPL: Universal Compiler for Programmable Logic Version 3.2a Serial# MD-32A-6848 Copyright (C) 1983,1989 Logical Devices, Inc. Created Thu Feb 17 18:57:36 1994 108: default next 'b'0000 out bgack040; 109: 110: /* This starts the 68030 bus as master branch. Here we 111: simply assert a bus grant to the '030 bus. */ 112: present 'b'0110 113: next 'b'0010 out bg30_; 114: 115: /* At this stage, we wait for a bus grant acknowledge back 116: from the '030 bus. Upon receipt of that, or negation of 117: the '030 request, we go on to the next state. */ 118: present 'b'0010 119: if bgack30_ next 'b'0011 ; 120: if !bgack30_ & br30_ next 'b'0010 out bg30_; 121: if !bgack30_ & !br30_ next 'b'0011 ; 122: 123: /* This state simply drops the 68030 bus grant. */ 124: present 'b'0011 125: next 'b'1010 ; 126: 127: /* This is the main '030-as-master running state. As long as 128: the '030 bus is master and no new grants some in, we hang 129: out here. If BGACK goes away, the arbiter goes back to 130: to the idle state. If a new bus request is asserted, a 131: grant must be presented to that master. */ 132: present 'b'1010 133: if br30_ next 'b'0100 out bg30_; 134: if bgack30_ & !br30_ next 'b'1010 ; 135: if !bgack30_ & !br30_ next 'b'0000 out bgack040; 136: 137: /* Here a 68030 bus grant is supplied to a potential new master 138: while the '030 bus is mastered by the original '030 master. */ 139: present 'b'0100 140: next 'b'1100 out bg30_; 141: 142: /* This state holds bus grant to the '030 bus active, waiting 143: for either the current '030 master to negate BGACK, or the 144: new '030 master to negate bus request. */ 145: present 'b'1100 146: if !br30_ next 'b'0011 ; 147: if bgack30_ & br30_ next 'b'1100 out bg30_; 148: if !bgack30_ & br30_ next 'b'0010 out bg30_; 149: 150: /* The remaining states manage the 68040 as master. Here, a 151: grant is simply driven to the '040 bus. */ 152: present 'b'1001 153: OUT bg40_; 154: next 'b'1000 out bgack040; 155: 156: /* This is the main 68040 as master running state. As long 157: as the '040 wants the bus and the '030 doesn't, stay 158: here. */ 159: present 'b'1000 160: OUT bg40_; 161: if !br30_ next 'b'1000 out bgack040; LISTING FOR LOGIC DESCRIPTION FILE: bctl.pld Page 4 CUPL: Universal Compiler for Programmable Logic Version 3.2a Serial# MD-32A-6848 Copyright (C) 1983,1989 Logical Devices, Inc. Created Thu Feb 17 18:57:37 1994 162: if br30_ & lock & !locke next 'b'1000 out bgack040; 163: if br30_ & lock & locke next 'b'0101 out bgack040; 164: if br30_ & !lock next 'b'0101 out bgack040; 165: 166: /* At this point we drop grant to the '040, and would like 167: to let the '030 on the bus. If the '040 has dropped bus 168: bus, it's ok to proceed. If not, either hang out here 169: as long as bus busy is asserted and we're not starting 170: a new locked cycle. If we are, go back to the running 171: state. */ 172: present 'b'0101 173: if !bb next 'b'0001 out bgack040; 174: if bb & !lock next 'b'0101 out bgack040; 175: if bb & lock & locke next 'b'0101 out bgack040; 176: if bb & lock & !locke next 'b'1000 out bgack040; 177: 178: /* Just for safety's sake, make sure we really did see the 179: '040 give the bus back. */ 180: present 'b'0001 181: if !bb next 'b'0000 out bgack040; 182: if bb & !br40_ next 'b'0101 out bgack040; 183: if bb & br40_ next 'b'1000 out bgack040; 184:} 185: 186: [0016cb] Please note: no expression assigned to: bg30_.ar [0016cb] Please note: no expression assigned to: bg30_.sp [0016cb] Please note: no expression assigned to: bgack040.ar [0016cb] Please note: no expression assigned to: bgack040.sp [0016cb] Please note: no expression assigned to: bs0.sp [0016cb] Please note: no expression assigned to: bs1.sp [0016cb] Please note: no expression assigned to: bs2.sp [0016cb] Please note: no expression assigned to: bs3.sp Jedec Fuse Checksum (0A9E) Jedec Transmit Checksum (F626)