PARTNO	  XXXXX ;
		NAME	  U106 ;
		DATE	  May 27, 1988;
		REV	  2;
		DESIGNER  Haynie ;
		COMPANY   Commodore ;
		ASSEMBLY  QUICKRAM ;
		LOCATION  U106;

/******************************************************************/
/*								  */
/*  QUICKRAM 	DRAM CAS generation				  */
/*								  */
/******************************************************************/
/*  Allowable Target Device Types: 20L8B 			  */
/******************************************************************/
/*  Free Pins: NONE						  */
/******************************************************************/
/*  HISTORY							  */
/*	DBH May 12:	Made from BIGRAM's U107R1, no QUICK logic */
/*			here just yet.				  */
/*	DBH May 27:	Fast stuff added here.			  */
/******************************************************************/

/**  Inputs  **/

PIN 1		= !RAS		;	/* RAS qualifier */
PIN 2		= !CAS		;	/* CAS qualifier */
PIN 3		= !PCAS		;	/* PAGE mode CAS */
PIN 4		= !DS		;	/* Data strobe qualifier */
PIN 5		= !REFRESH	;	/* This is a refresh cycle */
PIN 6		= !BYTELL	;	/* Qualifies lowest byte */
PIN 7		= !BYTELH	;	/* Qualifies next byte */
PIN 8		= !BYTEHL	;	/* Qualifies next byte */
PIN 9		= !BYTEHH	;	/* Qualifies highest byte */
PIN 10		= READ		;	/* This is a read cycle */
PIN 11		= !PAGE		;	/* Page match */
PIN 12		= !DELAY0	;	/* 1rst order delay */
PIN 14		= MEMSEL	;	/* It's for us */
PIN 23		= HIGH		;	/* Take the high word */

/**  Outputs  **/

PIN 15	     = !CAS0LL	 ;	/* CAS line */
PIN 16	     = !CAS0LH	 ;	/* CAS line */
PIN 17	     = !CAS0HL	 ;	/* CAS line */
PIN 18	     = !CAS0HH	 ;	/* CAS line */
PIN 19	     = !CAS1LL	 ;	/* CAS line */
PIN 20	     = !CAS1LH	 ;	/* CAS line */
PIN 21	     = !CAS1HL	 ;	/* CAS line */
PIN 22	     = !CAS1HH	 ;	/* CAS line */

/** Declarations and Intermediate Variable Definitions **/

/* We want CAS enabled when memory is selected and the CAS input from the
   delay line is asserted.  We want CAS off with RAS.  I may change RAS
   eventually to drop earlier; AS or possibly DS should cut us off just as
   quickly.  During a page cycle, CAS is always low, so PCAS supplies the
   basis for CAS assertion. */

casen	= MEMSEL & CAS & RAS & !PAGE
	# MEMSEL & PCAS & PAGE ;
lowen	= casen & !HIGH & DS ;
highen	= casen & HIGH & DS ;

/**  Logic Equations  **/

CAS0LL	= lowen & BYTELL
	# lowen & READ
	# REFRESH;

CAS1LL	= highen & BYTELL
	# highen & READ
	# REFRESH;

CAS0LH	= lowen & BYTELH
	# lowen & READ
	# REFRESH;

CAS1LH	= highen & BYTELH
	# highen & READ
	# REFRESH;

CAS0HL	= lowen & BYTEHL
	# lowen & READ
	# REFRESH;

CAS1HL	= highen & BYTEHL
	# highen & READ
	# REFRESH;

CAS0HH	= lowen & BYTEHH
	# lowen & READ
	# REFRESH;

CAS1HH	= highen & BYTEHH
	# highen & READ
	# REFRESH;