PARTNO		U101 ;
		NAME		U101 ;
		DATE		February 18, 1992 ;
		REV		2 ;
		DESIGNER	Dave Haynie ;
		COMPANY		Commodore ;
		ASSEMBLY	Nyx ;
		LOCATION	West Chester ;
		DEVICE		g22V10 ;

/************************************************************************/
/*									*/
/*	Nyx	Gary Spoofer & Pre-decoder				*/
/*									*/
/*	This device tricks Gary into acting as a proper Nyx system	*/
/*	controller.  It also generates some group decodes for Nyx	*/
/*	extensions.							*/
/*									*/
/************************************************************************/
/*									*/
/* DEVICE DATA:								*/
/*									*/
/*	Device:		22V10-10					*/
/*	Clock:		NONE						*/
/*	Unused:		16(I/O)						*/
/*									*/
/************************************************************************/
/*									*/
/* REVISION HISTORY:							*/
/*									*/
/*	DBH Oct 10:	Original version.				*/
/*	DBH Nov 19:	Corrected polarity of GA lines.			*/
/*	DBH Feb 18:	Forgot OVL term in Chip RAM disable logic.	*/
/*									*/
/************************************************************************/

/** INPUTS: **/

PIN [1..11]	=  [A30..20]	;	/* Bus address. */
PIN 13		= !BIGZ		;	/* Zorro III DMA indicator */
PIN 14		=  OVL		;	/* ROM overlays low Chip RAM */
/*PIN 15	= !EXROM	;*/	/* External ROM decoding used. */
PIN 22		=  A19		;	/* One more address */

/** OUTPUTS: **/

PIN 17		= !CRAMADDR	;	/* Chip RAM address */
PIN 18		=  GA22		;	/* Gary Address 22 */
PIN 19		=  GA23		;	/* Gary Address 23 */
PIN 20		=  GA31		;	/* Gary Address 31 */ 
PIN 21		= !NEWIO	;	/* Chip register space qualifier */

/** BIDIRECTIONALS: **/

PIN 23		=  A31		;	/* Bus version of A31. */

/** INTERNAL TERMS: **/

/* Valid processor access space? */

/* The bus address */

field addr 	= [A31..A19];

/* Some basic decodes. */

spc24		= addr:[00ffffff..00000000];

chiphigh	= addr:[01ffffff..01000000];

chiplow		= addr:[001fffff..00000000];

chipreg		= addr:[00dfffff..00d80000];

stdrom		= addr:[00ffffff..00f80000];

/** OUTPUT TERMS: **/

/* The A31 term fed to Gary is pulled high to disable Gary when 
   necessary.  Otherwise, it gets the A31 bus address.  Right now,
   we need Gary out of the way for disabled ROM cycles and any kind
   of Chip cycle. */

GA31		= A31
		# chiplow & !OVL
/*		# stdrom & EXROM*/
		# chipreg;

GA31.OE		= !BIGZ;

/* The bus version of A31 is normally an input.  When Zorro III DMA
   is in progress, it turns around low. */

A31		= 'b'0;
A31.OE		= BIGZ;

/* These lines are used for extending Gary's normal chip selects to
   cover more area.  At present, they're unused. */
   
GA23		= A23;
GA22		= A22;

/* This term provides the basic select for Chip RAM access. */

CRAMADDR	= chiplow & !OVL
		# chiphigh;

/* This term provides the basic select for Chip register access. */

NEWIO		= chipreg;